An FPGA Technologies Area Examination of the SHA-3 Hash Candidate Implementations
نویسندگان
چکیده
This paper presents an examination of the different FPGA architectures used to implement the various hash function candidates for the currently ongoing NIST-organised SHA-3 competition [1]. This paper is meant to be used as both a quick reference guide used in conjunction with the results table [2] as an aid in finding the best-fit FPGA for a particular algorithm, as well as a helpful guide for explaining the many different terms and measurement units used in the various FPGA packages.
منابع مشابه
FPGA Implementations of SHA-3 Candidates: CubeHash, Grøstl, LANE, Shabal and Spectral Hash
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عنوان ژورنال:
- IACR Cryptology ePrint Archive
دوره 2009 شماره
صفحات -
تاریخ انتشار 2009